1. Field of the Invention
The present invention relates generally to a method of verifying wiring layout of printed wiring boards, etc. by Computer Aided Design (referred to as "CAD" hereinafter), and more particularly to a method of verifying wiring layout which is capable of increasing the yield of high-density printed wiring boards.
2. Description of the Related Art
Because large-scale and complex circuits is greatly aided by computer, CAD is largely employed for circuit design for its accuracy and high processing speed.
A detailed description will now be provided on a standard process of a design system using CAD for each process in the numerical order shown in FIG. 1.
(1) Based on a circuit layout, an operator inputs graphic data into a large computer or a graphic workstation using a digitizer and a graphic display, to produce the data-base of the circuit layout. The data base includes the coded graphic data and/or image data.
(2) The large size computer automatically transforms the graphic data of the circuit layout stored inside into image data.
(3 ) The operator places arbitrarily desired parts to be loaded, e.g. connectors etc., using the circuit layout data. This computer performs an initial placing of other parts. The initial placement involves placing parts in prescribed positions on a screen upon the initiation of an operation. Several kinds of operations are known for the method of placement. In one method, parts are initially placed outside the contour of a board on the screen. Each part will be moved later manually to an appropriate position inside the contour of the board. In another method, parts are initially placed inside the contour of a board, in positions determined by optimizing of wiring lengths.
(4) The result of the initial placement is displayed on the graphic display. The logic connection between the parts are displayed in a form of rat's nests. A rat's nest is a group of lines connecting the initially placed parts. Because these straight lines are drawn without taking into account the positional relations between the parts, they look like a rat's nest from which this name is derived.
(5) The operator examines the rat's nest to evaluate the wiring. If there parts yet to be loaded still exist the parts are manually placed. Also, if there exists a portion of wiring, which is too long, or a portion in which rat's nests are too concentrated, the operator changes the position of the parts to improve the placement. Based on the information related to the changes, the rat's nest after the improvement is produced and is once again displayed. After repeating this operation several times, an optimum placement of the parts will be obtained.
A wiring, which is too long, may cause a signal delay or the influence of noises, which is significant to ignore, when the wiring is for transmitting high frequencies high frequency clock pulses or is used for a ground line. This is the reason why the wiring length is verified.
If there a portion exists in which wirings are overconcentrated, it is highly possible that the pattern development in that portion will be difficult at a later time. The existence of such a portion is checked in order to prevent the above-mentioned problem.
(6) After the placement of the parts is decided, pin allocation advantageous for patterning is automatically executed by computer programs. In this allocation, a library having the data for the parts, which have been previously registered, is searched to find out circuit blocks or pins replaceable by the registered circuit blocks or pins, and the replaceable blocks or pins are replaced by the corresponding blocks respectively, so that the allocation is carried out for facilitating wirings as much as possible.
(7) The results of the placement and the pin allocation are fed back to the graphic data of the circuit layout. Thus, the circuit layout is automatically completed, in which the characters of the parts, the placement locations, the pin numbers, etc. are decided.
(8) A description will be given next on the designing of a conductor pattern. "IC packaging ratio", and "wiring accommodation ratio" are calculated by the following equations: EQU IC packaging ratio =the number of IC packaged board areas; and EQU wiring accommodation ratio =total wiring length/board area.
It should be noted that the above two equations are basic equations, and minor changes may be made.
The operator determines which method of wiring, is to be employed in deciding the conductor from the methods of interactive automatic wiring, batch type automatic wiring, and manual wiring. The determination is made based on the operator's knowledge empirically acquired.
(9) The terminal positions of the parts, i.e. the positions of through-holes are produced by a pen plotter on a sheet of plotting paper ruled into 1-inch squares.
(10) A "from-to list" is output by the computer. The operator manually designs the conductor pattern by referring to the from-to list. The from-to list indicates to which pin of which part that each of the pins of all of the packaged parts of each net is connected. The "net" on the from-to list is a group of parts including parts connected by one conductor as a circuit.
(11) The operator digitizes via holes and the conductor pattern, to produce pattern data.
(12) The operator inputs the digitized pattern data, the circuit layout and the data of the packaged parts into the large computer or the graphic work-station. The CAD on the large computer checks as to whether the conductor pattern is correct and whether the conductor spacing is appropriate. The present invention is directed to an improvement of the checking of the conductor spacing, and a detailed description thereof will follow.
(13) After the checking, a modification operation is performed if necessary.
(14) A pattern layout and a parts assembly layout for manufacturing management.
(15) The computer outputs data required at the division of manufacturing printed wiring boards, printed wiring board manufacturing data, CAM (Computer Aided Manufacturing) interface data, EDP (Electronic Data Processing) interface data (list), etc. The output data are transferred to the manufacturing division of the printed wiring board as well as to the manufacturing division of devices.
Automatic wiring can be automatically performed by the CAD. By the aid of the CAD it is far easier to design circuits as compared to the case in which the entire design is carried out manually.
Knowledge of manually available wiring techniques are not entirely implemented by the automatic wiring programs. Human ability is still superior to that of the automatic wiring programs, in optimizing circuit wiring details, and in adding wirings onto a high-density printed wiring board, etc. Most of the layout design systems of printed wiring boards by the CAD employ both automatic wiring and manual wiring.
When inputting the data of wiring into the CAD system, the operator inputs the data using a keyboard watching an image on a CRT (Cathode Ray Tube), or using a digitizer. If wiring is manually performed as described above, however, it is generally unavoidable that, for example, erroneous data is input, or input data includes measuring error's. It is therefore necessary to strictly verify such manually produced design data.
In the automatic wiring programs, the wiring layout is performed in accordance with predetermined rules. Therefore, it seems to be unnecessary to strictly check the resultant design data by this automatic wiring program. Even in the case of the automatic wiring, however, checking is necessary because the conductor pattern is manually modified, as described above, in order to add interconnections to be wired or to change the design.
Visual checking is principally possible, but as wiring density is increased in recent printed wiring boards, it is extremely difficult to find out errors in physical requirements such as conductor spacings from the conductor pattern produced by a plotter.
Areas in which wiring is prohibited etc. tend to be overlooked in the case of manual checking. Presently, automatic checking by a computer is therefore indispensable in designing printed wiring boards.
As described above, a prescribed requirement should be met for conductor spacing. Such a requirement is imposed for the following reasons.
Manufacturing circuits in practice are processed by chemical or mechanical operations such as etching, drilling, etc. If the conductor spacing is too narrow, it is highly possible that adjacent portions to be etched are erroneously connected with each other upon etching, thereby causing short circuit defects in the products. Also, if a center axis is shifted when drilling is performed, adjacent wirings may be erroneously disconnected. In other words, it is necessary to secure the conductor spacing at more than a prescribed length, because the yield of the products should be kept at a prescribed percentage.
It is also necessary to provide a prescribed space between, for example, a power supply circuit liable to generate noises and other circuits, or between rightchannel and left-channel voice sound processing circuits in a stereo system. Regions considered to become easily affected by noise after the assembly are desirably excluded from pattern formation. This also imposes physical requirements such as conductor spacings on the wiring layout design.
Another reason for performing automatic checking is that a large amount of integrity of data is expected in processing the data by CAD when the circuit design is manually performed without computer as in the process of art working. As is well known, by the CAD, the placement of each part and wiring is defined by each lattice point of a basic lattice, and a placement between the lattice points which is not on the lattice points, is prohibited. On the other hand, in the process of art working, the original picture of wirings is produced manually. This operation is of an analog type, and even if an underlying sheet, etc. which corresponds to the basic lattice of the CAD is used in the operation, a violation of the rules when wiring is a high possibility. It is impossible to obtain an actual dimension if the conductor pattern data includes such a violation of the wiring specification. It is therefore necessary to check physical requirements such as conductor spacings, etc.
The spacing required for a proximity entity of a printed wiring board checked by the CAD was formally performed by a method of comparing a sole acceptable spacing value to be a reference and each of the entire data. Recently, a clearance value is separately provided for each kind of data to be checked, and is compared to data each corresponding thereto. The latter method is employed in accordance with the former method, because when considering all of the combinations of the data, the safest, i.e. the largest value is set to be a clearance value, and, therefore, parts which can otherwise be placed more closely to each other may be at a distance from each other which is more than necessary. By changing clearance values depending upon the kinds of the parts to be checked as in the latter method, a distance between the parts will not be unnecessarily great so that the wiring density of printed wiring boards is increased.
The following six kinds of clearance values are provided when, for example, data of three kinds, i.e. line, land, and through-hole, exist.
FIGS. 2 to 7 are diagrams each showing a display example by the CAD.
FIG. 2 is a diagram showing how a line-line (between two lines) spacing distance is verified. FIG. 3 is a diagram showing how a line-land (between a line and a land) spacing distance is verified. FIG. 4 is a diagram showing how a line-through-hole (between a line and a through-hole) spacing distance is verified. FIG. 5 is a diagram showing how a land-land (between two lands) spacing distance is verified. FIG. 6 is a diagram showing how a land-through-hole (between a land and a through-hole) spacing distance is verified. FIG. 7 is a diagram showing how a through-hole-through-hole (between two through-holes) spacing distance is checked.
Now, referring to FIGS. 2 to 7, the following required clearance values are employed: a predetermined distance A between line 1 and line 1; a predetermined distance B between line 1 and line 2; a predetermined distance C between line 1 and through-hole 3; a predetermined distance D between lands 2; a predetermined distance E between land 2 and through-hole 3; and a predetermined distance F between through-holes 3.
As mentioned above, conventionally, a clearance to be checked is previously provided for each kind of data, and checking suitable for each of the processes such as etching, drilling, etc. in the manufacturing process of the printed wiring boards is conducted with respect to the wiring data so as to achieve high density wirings.
The above-mentioned conventional method, however, includes the following critical shortcomings. One typical example of the problems is shown in FIG. 8. Referring to FIG. 8, lines 1a and 1b are parallel to each other. At the right of the line 1b is a land 2 (or a through-hole 3), and at the right of the land 2 (or the through-hole 3) is a line 1c having the same width as the diameter of the land 2 (or the through-hole 3), extending away from the line 1b in the direction orthogonal to the line 1b. Such a placement occurs often.
In the following discussion, it is assumed that a clearance value B (or C) between line-land (or line-through-hole) is selected to be smaller than a clearance value A between line-land. Referring to FIG. 8, the distance between the line 1a and 1b can be verified without any problem by using the distance A as a reference. The following problems, however, arise in checking the line 1b and a line 1c.
The end of the line 1c on the side of the line 1b overlaps the land 2 (or the through-hole 3). The distance used between the land 2 and the line 1b, should be a distance just more than B (or C) to be adequate. The distance between the line 1c and 1b is however taken for the distance between the line 1b and the land 2 (or the through-hole 3) by a determination in accordance with programs for checking spacings, because the end of the line 1c overlaps the land 2 (or the through-hole 3). Because the relation B &lt;A holds as described above, if the distance between the land 2 and the line 1b is selected to be close to the clearance value B, the distance between the line 1c and the line 1b (=B) will be smaller than A, and, therefore, it is determined by the program that the line 1c and the line 1b are placed too close to each other. In other words, it is determined that the placement of the line 1b and the line 1c is an error.
The positional relation between the lines 1c and 1b can sufficiently be checked as a line-land relation taking into account the manufacturing process, etc., as far as the line 1b and the line 1c are placed in accordance with the relation as shown in FIG. 8. In other words, it is sufficient for the distance between the land 2 and the line 1b to be larger.than the distance B.
In practice, however, the layout is determined to be an error as described above. Such errors take place in a number of places in a circuit layout, and, therefore, it will be impossible for the operator to cope with real errors which must be dealt with carefully. Thereby, it is hard to design without making errors.
A similar problem can take place between a line 1b, a land 2 (or a through-hole 3) which are reinforced by a tapering processing, and a line 1a. The tapering processing is applied in order to prevent disconnections, etc. due to the shift of the center axis, when a portion is drilled to form a hole after, for example, a pattern formation. In other words, without the tapering portion, the land 2 (or the through hole 3) is cut off from the line 1b by a drilled hole 4, when the drilled hole 4 is formed slightly shifted as shown in FIG. 10. On the other hand, as shown in FIG. 1, with the tapering processing is applied, a disconnection will not take place even if the drilled hole 4 is slightly shifted.
Now, referring back to FIG. 9, when the distance between the line 1a and the line 1b is checked, the distance between the land 2 (or the through hole 3) and the line la is determined to be the closest distance between the line 1a and 1b, which is smaller than the reference spacing value A between line-line, by the spacing checking programs, because the tapering portion of the line 1b overlaps the land 2 (or the through hole 3). The wiring layout is determined to be an error in the portion. However, the portion is large enough if determined by taking the reference spacing value B between line - land as a reference, and also, the error of the wiring layout in that portion should be canceled by so doing.
Conventional methods of checking spacing however do not have such a capability of making distinctions as described above. In the example shown in FIG. 8, the spacing checking between the land 2 (the through-hole 3) and the line lb as well as the spacing checking between the line 1c and the line 1b are made by taking the same clearance value as a reference after all. In a printed wiring board as described above, in which a line-line clearance is smaller than a line-land (or through-hole) clearance, if checking is made by taking the line-land clearance as a reference, the line-line clearance will be an error. On the other hand, if the line-line clearance is taken as a reference, the line-land clearance will be determined to be unnecessarily large.
In a printed wiring board in which a line-land (or through-hole) clearance is smaller than a line-line clearance, a line-land (or a through-hole) distance will be an error by taking the line-line clearance as a reference. On the other hand, a line-line distance will be unnecessarily large if the line-land clearance is taken as a reference.
In other words, in accordance with the conventional method, placements including those which are not inherent may be determined to be errors and a large number of errors to be displayed results, so that it would be practically impossible to find out true errors from those errors displayed at that time and to cope with them. Otherwise, a distance between wirings should be enlarged more than necessary in order to eliminate undeserved errors to be displayed, so that high density wirings cannot be obtained.